1. Field of the Invention
The present invention relates to a method of testing the functions of a printed wiring board, and particularly, to a method of testing a printed wiring board, to find short-circuit failures between the pins of each LSI (Large-scale Integrated Circuit) mounted on the board, or between wires connecting the LSIs.
2. Description of the Related Art
The number of wires arranged on a printed wiring board is increasing because circuit integration is advancing day by day. To test the functions of wires of the board, effective test patterns are required. Scan circuits are employed to test the board. The board supports LSIs connected to one another through the wires, i.e., nets, and these wires are tested for short-circuit failures. To carry out the test, test patterns are prepared to examine every combination of the wires on all the pins of the LSIs. These test patterns must efficiently carry out the test.
The test patterns apply the logical values 0 and 1 to the wires, and the scan circuits check the logical values in the wires, to detect short-circuit failures. One of the LSIs on the board is selected as a driver and another as a receiver. The output pins of the driver are connected to the input pins of the receiver through the wires. An expected value 0 or 1 is set for an objective output pin of the driver and an opposite expected value for the other output pins of the driver. Observed values at the input pins of the receiver are compared with the expected values, to find short-circuit failures. The test patterns, i.e., combinations of setting and expected values, are prepared for all output pins and are applied thereto through, for example, a tester.
An LSI has, for example, output pins AO, BO, CO, DO, EO, and FO, and these pins and the wires connected thereto are tested for short-circuit failures. For the sake of simplicity of explanation, the scan circuits are supposed to be capable of setting either one of the logical values 0 and 1 on each output pin. A test pattern is prepared to set the logical value 1 only on the output pin AO and the logical value 0 on the other output pins BO to FO. The test pattern is applied to the output pins, and actual values appearing at the output pins BO to FO are observed. If any of the observed values is 1 instead of the expected value 0, the corresponding output pin is short-circuited to the output pin AO. Another test pattern is prepared which sets the logical value 1 on the output pin BO and the logical value 0 on the other output pins AO and CO to FO. Similarly, other test patterns are prepared.
According to the prior art, the number of test patterns prepared is equal to the number of combinations of wires and, therefore, is very large. Namely, the prior art ineffectively prepares test patterns which take a long time to find short-circuit failures.